Functional Partitioning for Reduced Power
نویسندگان
چکیده
Power consumption in VLSI systems has become a critical metric for design evaluation. Although power reduction techniques can be applied at every level of design abstraction, most automated power reduction techniques apply to the lower levels of design abstraction, such as the register-transfer or gate level. We therefore investigated the power reduction attainable by the evolving automated behavioral-level technique of functional partitioning, in which a behavioral process is automatically divided into several smaller, mutually-exclusive, interacting processes. We demonstrate through several experiments that functional partitioning, which has already been shown to yield improvements in solving problems of I/O constraint satisfaction, synthesis complexity, and hardware/software partitioning, can also yield substantial reduction in power consumption (on average 41% total power reduction) with some overhead in size and performance. Functional Partitioning for Reduced Power Enoch Hwang Frank Vahid Yu-Chin Hsu Department of Computer Science University of California, Riverside, CA 92521 [email protected] [email protected] [email protected]
منابع مشابه
FSMD Functional Partitioning for Low Power Using Energy Estimation and Bounds
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متن کاملAbstract of the Dissertation Functional Partitioning for Low Power by Enoch
of the Dissertation Functional Partitioning for Low Power
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Power reductions in VLSI systems have become a critical metric for design evaluation. Although power reduction techniques can be applied at every level of design abstraction, most automated power reduction techniques apply to the lower levels of design abstraction. Previous works have shown that sizable power reductions can be achieved by shutting down a system’s sub-circuits when they are not ...
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Power consumption in VLSI systems has become a critical metric for design evaluation. Although power reduction techniques can be applied at every level of design abstraction, most techniques are applied to the lower levels such as the register-transfer or gate levels and are limited to reducing power only to a portion of the entire circuit. We demonstrate power reduction using a coarsegrained p...
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